[all-commits] [llvm/llvm-project] f20af7: [bolt] Support arm64 FP register spills (#73021)

[eleviant via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f20af7372fcef3f317743063999403beba630078
      https://github.com/llvm/llvm-project/commit/f20af7372fcef3f317743063999403beba630078
  Author: eleviant <56861949+eleviant at users.noreply.github.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
    A bolt/test/AArch64/fp-reg-spill.s

  Log Message:
  -----------
  [bolt] Support arm64 FP register spills (#73021)

At the moment llvm-bolt fails when analyzing jump tables on aarch64 in
case FP register spill/reload is used.