[all-commits] [llvm/llvm-project] 3c5b42: [RISCV] Allocate the varargs GPR save area as a si...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3c5b42acd3e2022da40f6e4b50f5035279b8b93a
      https://github.com/llvm/llvm-project/commit/3c5b42acd3e2022da40f6e4b50f5035279b8b93a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
    M llvm/test/CodeGen/RISCV/vararg.ll

  Log Message:
  -----------
  [RISCV] Allocate the varargs GPR save area as a single object. (#74354)

Previously we allocated one object for each GPR. We also allocated the
same offset twice, once to save for VASTART and then again for the first
register in the save loop.

This patch uses a single object for all the registers and shares this
with VASTART. This is more consistent with other targets like AArch64
and ARM.

I've removed the setValue(nullptr) from the memory operand now. Having a
single object makes me a lot more comfortable about alias analysis being
able to see what is going on. This led to the scheduling changes in
push-pop-popret.ll and vararg.ll.