[all-commits] [llvm/llvm-project] 26fc26: [RISCV] Simplify computation of VarArgsSaveSize. N...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 26fc26c184bae3e5eb6f481f63edb7c285ada272
      https://github.com/llvm/llvm-project/commit/26fc26c184bae3e5eb6f481f63edb7c285ada272
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-12-03 (Sun, 03 Dec 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Simplify computation of VarArgsSaveSize. NFC (#74209)

The computation we use for computing the size already returns 0 when all
registers are allocated. We don't need an if to set it to 0.

Use the size being 0 to check for whether we need to spill registers or
not.

I have another change I want to make to this code, but this change
seemed to stand on its own. I left the curly braces since I need them
for the other change.