[all-commits] [llvm/llvm-project] cf1a97: [RISCV] Minimally modify incoming state in transfe...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cf1a979ccfa722c3f9fce28c66c13a222990eac4
      https://github.com/llvm/llvm-project/commit/cf1a979ccfa722c3f9fce28c66c13a222990eac4
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-12-01 (Fri, 01 Dec 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  -----------
  [RISCV] Minimally modify incoming state in transferBefore (#72352)

transferBefore currently takes an incoming state and an instruction,
computes
the new state needed for the instruction, and then modifies that new
state to
be more similar to the incoming state.

This patch reverses the approach by instead taking the incoming state
and
modifying only the bits that are demanded by the instruction.