[all-commits] [llvm/llvm-project] dbbc7c: [LoongArch] Add some binary IR instructions testca...

[leecheechen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dbbc7c31c8e55d72dc243b244e386a25132e7215
      https://github.com/llvm/llvm-project/commit/dbbc7c31c8e55d72dc243b244e386a25132e7215
  Author: leecheechen <chenli at loongson.cn>
  Date:   2023-12-01 (Fri, 01 Dec 2023)

  Changed paths:
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/ashr.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fadd.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fmul.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fsub.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/lshr.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mul.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sdiv.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shl.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
    A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/udiv.ll

  Log Message:
  -----------
  [LoongArch] Add some binary IR instructions testcases for LASX (#74031)

The IR instructions include:
- Binary Operations: add fadd sub fsub mul fmul udiv sdiv fdiv
- Bitwise Binary Operations: shl lshr ashr