[all-commits] [llvm/llvm-project] 29a0f3: [LoongArch] Add some binary IR instructions testca...

[leecheechen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 29a0f3ec2b47630ce229953fe7250e741b6c10b6
      https://github.com/llvm/llvm-project/commit/29a0f3ec2b47630ce229953fe7250e741b6c10b6
  Author: leecheechen <chenli at loongson.cn>
  Date:   2023-11-30 (Thu, 30 Nov 2023)

  Changed paths:
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/ashr.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fadd.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fmul.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fsub.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/lshr.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mul.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sdiv.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shl.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
    A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/udiv.ll

  Log Message:
  -----------
  [LoongArch] Add some binary IR instructions testcases for LSX (#73929)

The IR instructions include:
- Binary Operations: add fadd sub fsub mul fmul udiv sdiv fdiv
- Bitwise Binary Operations: shl lshr ashr