[all-commits] [llvm/llvm-project] a1b3b7: [AMDGPU] Clarify description of _HI relocation typ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a1b3b78c55be7e95042e22d83a7f183ae6cc865a
      https://github.com/llvm/llvm-project/commit/a1b3b78c55be7e95042e22d83a7f183ae6cc865a
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2023-11-28 (Tue, 28 Nov 2023)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [AMDGPU] Clarify description of _HI relocation types (#73663)

Clarify how the addend is used in _HI relocation types like
R_AMDGPU_ABS32_HI based on the current behaviour of the Mesa and AMDPAL
ELF loaders.

This affects Mesa and AMDPAL because they use REL relocation records, so
the addend for these types is the 32-bit literal value from the
instruction being relocated. AMDHSA is not affected because it uses RELA
relocation records which have a 64-bit addend.