[all-commits] [llvm/llvm-project] ab7110: [AArch64][SVE] Remove pseudo from LD1_IMM (#73631)

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ab7110bcd6b137803935508de8c9f6af377f9454
      https://github.com/llvm/llvm-project/commit/ab7110bcd6b137803935508de8c9f6af377f9454
  Author: David Green <david.green at arm.com>
  Date:   2023-11-28 (Tue, 28 Nov 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedA510.td
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
    M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
    M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
    M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fcopysign.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-arith.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-fma.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-minmax.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests-crash.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-arith.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-compares.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-log.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-minmax.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-shifts.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-subvector.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle-tbl.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
    M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
    M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
    M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
    M llvm/test/CodeGen/AArch64/sve-ld-post-inc.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ext-loads.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-extend-trunc.ll
    M llvm/test/CodeGen/AArch64/sve-vscale-attr.ll
    M llvm/test/CodeGen/AArch64/sve2-fixed-length-fcopysign.ll

  Log Message:
  -----------
  [AArch64][SVE] Remove pseudo from LD1_IMM (#73631)

The LD1 immediate offset instructions have both a pseudo and a real
instruction, mostly as the instructions shares a tablegen class with the
FFR version of the instructions. As far as I can tell the pseudo for the
non-ffr versions does not serve any useful purpose though, and we can
rejig the the classes to only define the pseudo for FFR instructions
similar to the existing sve_mem_cld_ss instructions.

The end result of this is that we don't have a SideEffects flag on the
LD1_IMM instructions whilst scheduling them, and have a few less pseudo
instructions which is usually a good thing.