[all-commits] [llvm/llvm-project] 03d4a9: [InstCombine] Set disjoint flag when turning Add i...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03d4a9d94da30590ebfc444cf13a8763f47b7bb9
      https://github.com/llvm/llvm-project/commit/03d4a9d94da30590ebfc444cf13a8763f47b7bb9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-27 (Mon, 27 Nov 2023)

  Changed paths:
    M clang/test/CodeGen/aarch64-ls64-inline-asm.c
    M clang/test/CodeGen/ms-intrinsics.c
    M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    M llvm/test/Analysis/ValueTracking/assume.ll
    M llvm/test/Transforms/InstCombine/add.ll
    M llvm/test/Transforms/InstCombine/add2.ll
    M llvm/test/Transforms/InstCombine/apint-add.ll
    M llvm/test/Transforms/InstCombine/apint-shift.ll
    M llvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
    M llvm/test/Transforms/InstCombine/masked-merge-add.ll
    M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
    M llvm/test/Transforms/InstCombine/or.ll
    M llvm/test/Transforms/InstCombine/pr72433.ll
    M llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll
    M llvm/test/Transforms/InstCombine/rem.ll
    M llvm/test/Transforms/LoopUnroll/AArch64/runtime-unroll-generic.ll
    M llvm/test/Transforms/LoopUnroll/WebAssembly/basic-unrolling.ll
    M llvm/test/Transforms/LoopUnroll/runtime-multiexit-heuristic.ll
    M llvm/test/Transforms/LoopUnroll/runtime-unroll-remainder.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
    M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
    M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
    M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
    M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
    M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
    M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
    M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
    M llvm/test/Transforms/LoopVectorize/float-induction.ll
    M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
    M llvm/test/Transforms/LoopVectorize/reduction.ll
    M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
    M llvm/test/Transforms/LoopVectorize/uniform-args-call-variants.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
    M llvm/test/Transforms/PhaseOrdering/X86/SROA-after-final-loop-unrolling-2.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll

  Log Message:
  -----------
  [InstCombine] Set disjoint flag when turning Add into Or. (#72702)

The disjoint flag was recently added to IR in #72583