[all-commits] [llvm/llvm-project] 771676: [mlir][spirv] Add missing group non-uniform bitwis...
Jakub Kuderski via All-commits
all-commits at lists.llvm.org
Sun Nov 26 20:23:33 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 771676878a1df2610cdc2ece6a55b4aa81a3da6a
https://github.com/llvm/llvm-project/commit/771676878a1df2610cdc2ece6a55b4aa81a3da6a
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2023-11-26 (Sun, 26 Nov 2023)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
Log Message:
-----------
[mlir][spirv] Add missing group non-uniform bitwise and logical ops (#73475)
This covers the following ops:
`spirv.GroupNonUniform` x {`Bitwise`, `Logical`} x {`And`, `Or`, `Xor`}
We need these to efficiently lower from the `gpu.subgroup_reduce` op.
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