[all-commits] [llvm/llvm-project] 8c2537: [X86][MC] Support encoding/decoding for PUSH2[P]/P...

Shengchen Kan via All-commits all-commits at lists.llvm.org
Thu Nov 23 20:30:10 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8c2537fde66406dd08021d28e302e1cdb862fc3f
      https://github.com/llvm/llvm-project/commit/8c2537fde66406dd08021d28e302e1cdb862fc3f
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2023-11-24 (Fri, 24 Nov 2023)

  Changed paths:
    M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
    M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
    M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
    M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
    M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
    M llvm/lib/Target/X86/X86InstrFormats.td
    M llvm/lib/Target/X86/X86InstrMisc.td
    A llvm/test/MC/Disassembler/X86/apx/push2-pop2.txt
    A llvm/test/MC/Disassembler/X86/apx/push2p-pop2p.txt
    A llvm/test/MC/X86/apx/push2-pop2-att.s
    A llvm/test/MC/X86/apx/push2-pop2-intel.s
    A llvm/test/MC/X86/apx/push2p-pop2p-att.s
    A llvm/test/MC/X86/apx/push2p-pop2p-intel.s
    M llvm/utils/TableGen/X86DisassemblerTables.cpp
    M llvm/utils/TableGen/X86DisassemblerTables.h
    M llvm/utils/TableGen/X86RecognizableInstr.cpp
    M llvm/utils/TableGen/X86RecognizableInstr.h

  Log Message:
  -----------
  [X86][MC] Support encoding/decoding for PUSH2[P]/POP2[P] (#73233)

PUSH2 and POP2 are two new instructions for (respectively)
pushing/popping 2 GPRs at a time to/from
the stack. The opcodes of PUSH2 and POP2 are those of “PUSH r/m” and
“POP r/m” from legacy map 0, but we
require ModRM.Mod = 3 in order to disallow memory operand. 

The 1-bit Push-Pop Acceleration hint described in #73092 applies to
PUSH2/POP2 too, then we have PUSH2P/POP2P.

For AT&T syntax, PUSH2[P] pushes the registers from right to left onto
the stack. POP2[P] pops the stack to registers from right to left. Intel
syntax has the opposite order - from left to right.

The assembly syntax is aligned with GCC & binutils
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/637718.html




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