[all-commits] [llvm/llvm-project] 7c3c8a: [RISCV][GISel] Add support for G_IS_FPCLASS in F a...
Min-Yih Hsu via All-commits
all-commits at lists.llvm.org
Wed Nov 22 16:43:35 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7c3c8a12775bdb0b0771986f008e2589db4846f9
https://github.com/llvm/llvm-project/commit/7c3c8a12775bdb0b0771986f008e2589db4846f9
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2023-11-22 (Wed, 22 Nov 2023)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
A llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/is-fpclass-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/is-fpclass-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-is-fpclass-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-is-fpclass-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/is-fpclass-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/is-fpclass-rv64.mir
Log Message:
-----------
[RISCV][GISel] Add support for G_IS_FPCLASS in F and D extensions (#72000)
Add legalizer, regbankselect, and isel supports for floating point
version of G_IS_FPCLASS.
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