[all-commits] [llvm/llvm-project] f79676: [SVE2.1][Clang][LLVM]Add BFloat16 builtin in Clang...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f79676a17eae4c63318561ba35613d97053fa12c
      https://github.com/llvm/llvm-project/commit/f79676a17eae4c63318561ba35613d97053fa12c
  Author: CarolineConcatto <51754594+CarolineConcatto at users.noreply.github.com>
  Date:   2023-11-21 (Tue, 21 Nov 2023)

  Changed paths:
    M clang/include/clang/Basic/arm_sve.td
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfadd.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfclamp.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmax.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmaxnm.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmin.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfminnm.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmla_lane.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmls_lane.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmul_lane.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfsub.c
    M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfadd.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfclamp.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmax.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmaxnm.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmin.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfminnm.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmla_lane.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmls_lane.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmlsl.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfmul_lane.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfsub.ll
    M llvm/test/MC/AArch64/SVE2p1/bfadd.s
    M llvm/test/MC/AArch64/SVE2p1/bfclamp.s
    M llvm/test/MC/AArch64/SVE2p1/bfmax.s
    M llvm/test/MC/AArch64/SVE2p1/bfmaxnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmin.s
    M llvm/test/MC/AArch64/SVE2p1/bfminnm.s
    M llvm/test/MC/AArch64/SVE2p1/bfmla.s
    M llvm/test/MC/AArch64/SVE2p1/bfmls.s
    M llvm/test/MC/AArch64/SVE2p1/bfmul.s
    M llvm/test/MC/AArch64/SVE2p1/bfsub.s

  Log Message:
  -----------
  [SVE2.1][Clang][LLVM]Add BFloat16 builtin in Clang and LLVM intrinisc (#70362)

This patch implements the builtins in Clang
and the LLVM-IR intrinsic for the following:

For BFADD , BFSUB, BFMAX, BFMIN, BFMAXNM and BFMINNM, for instance: 
svbfloat16_t svadd[_bf16]_m (svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svadd[_bf16]_x (svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svadd[_bf16]_z (svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svadd[_n_bf16]_m (svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);
svbfloat16_t svadd[_n_bf16]_x (svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);
svbfloat16_t svadd[_n_bf16]_z (svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);
the add, could be replaced by sub, max, min, maxnm and minnm.

For BFMUL:
svbfloat16_t svmul[_bf16]_m(svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svmul[_bf16]_x(svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svmul[_bf16]_z(svbool_t pg, svbfloat16_t zdn, svbfloat16_t
zm);
svbfloat16_t svmul[_n_bf16]_m(svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);
svbfloat16_t svmul[_n_bf16]_x(svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);
svbfloat16_t svmul[_n_bf16]_z(svbool_t pg, svbfloat16_t zdn, bfloat16_t
zm);

svbfloat16_t svmul_lane[_bf16](svbfloat16_t zn, svbfloat16_t zm,
                               uint64_t imm_idx);

For BFCLAMP:
svbfloat16_t svclamp[_bf16](svbfloat16_t op, svbfloat16_t min,
svbfloat16_t max);

For BFMLA and BFMLS
svbfloat16_t svmla[_bf16]_m(svbool_t pg, svbfloat16_t zda, svbfloat16_t
zn,
                            svbfloat16_t zm);
svbfloat16_t svmla[_bf16]_z(svbool_t pg, svbfloat16_t zda, svbfloat16_t
zn,
                            svbfloat16_t zm);
svbfloat16_t svmla[_bf16]_x(svbool_t pg, svbfloat16_t zda, svbfloat16_t
zn,
                            svbfloat16_t zm);
svbfloat16_t svmla[_n_bf16]_m(svbool_t pg, svbfloat16_t zda,
svbfloat16_t zn,
                              bfloat16_t zm);
svbfloat16_t svmla[_n_bf16]_z(svbool_t pg, svbfloat16_t zda,
svbfloat16_t zn,
                              bfloat16_t zm);
svbfloat16_t svmla[_n_bf16]_x(svbool_t pg, svbfloat16_t zda,
svbfloat16_t zn,
                              bfloat16_t zm);

svbfloat16_t svmla_lane[_bf16](svbfloat16_t zda, svbfloat16_t zn,
                               svbfloat16_t zm, uint64_t

According to the PR#257[1]
[1]ARM-software/acle#257

Co-authored-by: Matthew Devereau <matthew.devereau at arm.com>