[all-commits] [llvm/llvm-project] c77d79: [SVE2.1][Clang][LLVM]Add 128bits builtin in Clang ...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c77d79b6fe6aa55ef50a3b828581068a21dce71d
      https://github.com/llvm/llvm-project/commit/c77d79b6fe6aa55ef50a3b828581068a21dce71d
  Author: CarolineConcatto <51754594+CarolineConcatto at users.noreply.github.com>
  Date:   2023-11-21 (Tue, 21 Nov 2023)

  Changed paths:
    M clang/include/clang/Basic/arm_sve.td
    M clang/include/clang/Basic/arm_sve_sme_incl.td
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tblq.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_tbxq.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq1.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uzpq2.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq1.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_zipq2.c
    M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-pred.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-vector.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tblq.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tbxq.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq1.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq2.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq1.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq2.ll

  Log Message:
  -----------
  [SVE2.1][Clang][LLVM]Add 128bits builtin in Clang and LLVM intrinisc (#71930)

This patch implements the builtins in Clang
and the LLVM-IR intrinsic for the following:

EXTQ
// Variants are also available for:
// _s8, _s16, _u16, _s32, _u32, _s64, _u64
// _bf16, _f16, _f32, _f64
svuint8_t svextq_lane[_u8](svuint8_t zdn, svuint8_t zm, uint64_t imm);

TBLQ and TBXQ
// Variants are also available for:
// _u8, _u16, _s16, _u32, _s32, _u64, _s64
// _bf16, _f16, _f32, _f64
svint8_t svtblq[_s8](svint8_t zn, svuint8_t zm);
svint8_t svtbxq[_s8](svint8_t zn, svuint8_t zm);

UZPQ1, UZPQ2, ZIPQ1 and ZIPQ2
// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64
// _bf16, _f16, _f32, _f64
svuint8_t svuzpq1[_u8](svuint8_t zn, svuint8_t zm); svuint8_t
svuzpq2[_u8](svuint8_t zn, svuint8_t zm); svuint8_t
svzipq1[_u8](svuint8_t zn, svuint8_t zm); svuint8_t
svzipq2[_u8](svuint8_t zn, svuint8_t zm);

PMOV
// Variants are available for:
// _s8, _u16, _s16, _s32, _u32, _s64, _u64
svbool_t svpmov_lane[_u8](svuint8_t zn, uint64_t imm); svbool_t
svpmov[_u8](svuint8_t zn); // The immediate is zero svuint8_t
svpmov_u8_z(svbool_t pn); // The immediate is zero

// Variants are available for:
// _s16, _s32, _u32, _s64, _u64
svuint16_t svpmov_lane[_u16]_m(svuint16_t zd, svbool_t pn, uint64_t
imm);

According to the PR#257[1]
[1]ARM-software/acle#257

Co-authored-by: Hassnaa Hamdi <hassnaa.hamdi at arm.com>