[all-commits] [llvm/llvm-project] 98efa8: [DAG] Fix ShrinkDemandedOp doxygen description to ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 98efa8f9aad3e81224d826113620f1cef7708c4a
      https://github.com/llvm/llvm-project/commit/98efa8f9aad3e81224d826113620f1cef7708c4a
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-11-18 (Sat, 18 Nov 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  [DAG] Fix ShrinkDemandedOp doxygen description to match behaviour. NFC.

ShrinkDemandedOp checks for both isTruncateFree AND isZExtFree but extends with ANY_EXTEND.


  Commit: aeccab5664ed05ccd490302a699144d2c2dea59d
      https://github.com/llvm/llvm-project/commit/aeccab5664ed05ccd490302a699144d2c2dea59d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-11-18 (Sat, 18 Nov 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll

  Log Message:
  -----------
  Revert rGbfbfd1caa4da "[X86] combineLoad - try to reuse existing constant pool entries for smaller vector constant data"

Investigating reports of this causing infinite loops


Compare: https://github.com/llvm/llvm-project/compare/7fd021a09290...aeccab5664ed