[all-commits] [llvm/llvm-project] 635756: [X86] Place data in large sections for large code ...

[Vitaly Buka via All-commits]

  Branch: refs/heads/users/vitalybuka/spr/msanaarch64-improve-argument-classification
  Home:   https://github.com/llvm/llvm-project
  Commit: 635756e4f3c5c0d31c11cea7b80108ea38570323
      https://github.com/llvm/llvm-project/commit/635756e4f3c5c0d31c11cea7b80108ea38570323
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/test/CodeGen/X86/code-model-elf-sections.ll

  Log Message:
  -----------
  [X86] Place data in large sections for large code model (#70265)

This allows better interoperability mixing small/medium/large code model
code since large code model data can be put into separate large
sections.

And respect large data threshold under large code model.
gcc also does this: https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html.

See https://groups.google.com/g/x86-64-abi/c/jnQdJeabxiU.


  Commit: 813aaf39f94609a46f38f1e3a15a763a2cc0d2cf
      https://github.com/llvm/llvm-project/commit/813aaf39f94609a46f38f1e3a15a763a2cc0d2cf
  Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    A mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir

  Log Message:
  -----------
  [mlir][sparse] stress test BSR (#72712)

I always enjoy a good stress test. This end-to-end integration test
ensures the major ordering of both the block and within the block are
correctly handled (giving row-row, row-col, col-row and col-row as
options).


  Commit: d5ab48e583c843393a86a4e166007688baeb1263
      https://github.com/llvm/llvm-project/commit/d5ab48e583c843393a86a4e166007688baeb1263
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

  Log Message:
  -----------
  [AArch64] Simplify legalizer info for G_JUMP_TABLE and G_BRJT. (#71962)

Remove s64 as a valid type for G_JUMP_TABLE since I think it is always a
pointer?

Replace custom predicate for G_BRJT with a legalFor that checks 2 types.


  Commit: e7f350951b304f0426832b0b6482c8bedf239c23
      https://github.com/llvm/llvm-project/commit/e7f350951b304f0426832b0b6482c8bedf239c23
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
    M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg_shadow.ll

  Log Message:
  -----------
  [msan][aarch64] Fix cleanup of unused part of overflow area

Similar to a05e736d288a7f2009ee9d057e78713d9adeeb5f.

Reviewers: thurstond, kstoimenov

Reviewed By: thurstond

Pull Request: https://github.com/llvm/llvm-project/pull/72722


  Commit: faaea79ed58b365c19ba4a0581d7f8d6e0ec8351
      https://github.com/llvm/llvm-project/commit/faaea79ed58b365c19ba4a0581d7f8d6e0ec8351
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    M compiler-rt/test/msan/vararg_shadow.cpp

  Log Message:
  -----------
  [msan][test] Add ptr test case


  Commit: b22775918a37f33cdcc76730234986f8134c4568
      https://github.com/llvm/llvm-project/commit/b22775918a37f33cdcc76730234986f8134c4568
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2023-11-17 (Fri, 17 Nov 2023)

  Changed paths:
    M compiler-rt/test/msan/vararg_shadow.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/X86/code-model-elf-sections.ll
    A mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir

  Log Message:
  -----------
  rebase

Created using spr 1.3.4


Compare: https://github.com/llvm/llvm-project/compare/d6c9261b303e...b22775918a37