[all-commits] [llvm/llvm-project] c6f7b6: [mlir][spirv] Fix VectorShuffle assembly format (#...

[Jakub Kuderski via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c6f7b631a9c0757130a8a7bb6b0ccc10da340e42
      https://github.com/llvm/llvm-project/commit/c6f7b631a9c0757130a8a7bb6b0ccc10da340e42
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2023-11-16 (Thu, 16 Nov 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
    M mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
    M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
    M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
    M mlir/test/Target/SPIRV/composite-op.mlir

  Log Message:
  -----------
  [mlir][spirv] Fix VectorShuffle assembly format (#72568)

Align with the rest of the spirv dialect by using a functional type
syntax.

Regex for updating existing code:
`spirv\.VectorShuffle (\[.+\]) (%[^:]+): ([^,]+), (%[^:]+): ([^\s]+) ->(.+)`
 ==>
`spirv.VectorShuffle $1 $2, $4 : $3, $5 ->$6`