[all-commits] [llvm/llvm-project] 9e88a2: [RISCV][GISel] Add isPreISelGenericFloatingPointOp...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9e88a2072f89ced51933780bcadcd87cb230eaf2
      https://github.com/llvm/llvm-project/commit/9e88a2072f89ced51933780bcadcd87cb230eaf2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-15 (Wed, 15 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h

  Log Message:
  -----------
  [RISCV][GISel] Add isPreISelGenericFloatingPointOpcode and FPConstraints. NFC

This brings us closer to how AArch64 is structured. I plan to use
isPreISelGenericFloatingPointOpcode in another change.


  Commit: 181e8065ed56a3c3c3686c091e901e3481321840
      https://github.com/llvm/llvm-project/commit/181e8065ed56a3c3c3686c091e901e3481321840
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-15 (Wed, 15 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp

  Log Message:
  -----------
  [RISCV][GISel] Handle FP instructions in the default case of register bank selection. NFC

Use isPreISelGenericFloatingPointOpcode to to indicate when to use
an FP ValueMapping.


Compare: https://github.com/llvm/llvm-project/compare/e84575449fc7...181e8065ed56