[all-commits] [llvm/llvm-project] de8f90: [RISCV] Simplify assembler error information for R...

[Jianjian Guan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: de8f906d86622c2bd51073accf8ca309c15d2c2a
      https://github.com/llvm/llvm-project/commit/de8f906d86622c2bd51073accf8ca309c15d2c2a
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2023-11-16 (Thu, 16 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/test/MC/RISCV/rvv/add.s
    M llvm/test/MC/RISCV/rvv/and.s
    M llvm/test/MC/RISCV/rvv/clip.s
    M llvm/test/MC/RISCV/rvv/compare.s
    M llvm/test/MC/RISCV/rvv/convert.s
    M llvm/test/MC/RISCV/rvv/div.s
    M llvm/test/MC/RISCV/rvv/ext.s
    M llvm/test/MC/RISCV/rvv/fadd.s
    M llvm/test/MC/RISCV/rvv/fcompare.s
    M llvm/test/MC/RISCV/rvv/fdiv.s
    M llvm/test/MC/RISCV/rvv/fmacc.s
    M llvm/test/MC/RISCV/rvv/fminmax.s
    M llvm/test/MC/RISCV/rvv/fmul.s
    M llvm/test/MC/RISCV/rvv/fmv.s
    M llvm/test/MC/RISCV/rvv/fothers.s
    M llvm/test/MC/RISCV/rvv/freduction.s
    M llvm/test/MC/RISCV/rvv/fsub.s
    M llvm/test/MC/RISCV/rvv/load.s
    M llvm/test/MC/RISCV/rvv/macc.s
    M llvm/test/MC/RISCV/rvv/mask.s
    M llvm/test/MC/RISCV/rvv/minmax.s
    M llvm/test/MC/RISCV/rvv/mul.s
    M llvm/test/MC/RISCV/rvv/mv.s
    M llvm/test/MC/RISCV/rvv/or.s
    M llvm/test/MC/RISCV/rvv/others.s
    M llvm/test/MC/RISCV/rvv/reduction.s
    M llvm/test/MC/RISCV/rvv/shift.s
    M llvm/test/MC/RISCV/rvv/sign-injection.s
    M llvm/test/MC/RISCV/rvv/store.s
    M llvm/test/MC/RISCV/rvv/sub.s
    M llvm/test/MC/RISCV/rvv/vsetvl.s
    M llvm/test/MC/RISCV/rvv/xor.s
    M llvm/test/MC/RISCV/rvv/zvlsseg.s

  Log Message:
  -----------
  [RISCV] Simplify assembler error information for RVV instructions (#72469)

Since vector embedded extensions have dependence, we don't have to show
several extensions in the error messages.