[all-commits] [llvm/llvm-project] 692fbd: [AArch64][GlobalISel] Support udot lowering for ve...

[chuongg3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 692fbd6c009e6eea6ad4f982859fb8bbc085845d
      https://github.com/llvm/llvm-project/commit/692fbd6c009e6eea6ad4f982859fb8bbc085845d
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2023-11-15 (Wed, 15 Nov 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Combine.td
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    M llvm/test/CodeGen/AArch64/vecreduce-add.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Support udot lowering for vecreduce add (#70784)

vecreduce_add(mul(ext, ext)) -> vecreduce_add(udot) 
vecreduce_add(ext) -> vecreduce_add(ext)

Vectors of scalar size of 8-bits with element count of multiples of 8