[all-commits] [llvm/llvm-project] a7bbcc: [RISCV][GISEL] Add support for lowerFormalArgument...

[Michael Maitland via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a7bbcc4690215bebb5aa5eee75c712e5a23fd09e
      https://github.com/llvm/llvm-project/commit/a7bbcc4690215bebb5aa5eee75c712e5a23fd09e
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2023-11-14 (Tue, 14 Nov 2023)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/lib/CodeGen/LowLevelType.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-bf16-err.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-f16-err.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll

  Log Message:
  -----------
  [RISCV][GISEL] Add support for lowerFormalArguments that contain scalable vector types (#70882)

Scalable vector types from LLVM IR can be lowered to scalable vector
types in MIR according to the RISCVAssignFn.