[all-commits] [llvm/llvm-project] f6ae50: [SLP]Emit actual bitwidth for analyzed MinBitwidth...

[Alexey Bataev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6ae50f710d02d8553d28192a1f048b2a9e1fc4d
      https://github.com/llvm/llvm-project/commit/f6ae50f710d02d8553d28192a1f048b2a9e1fc4d
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2023-11-14 (Tue, 14 Nov 2023)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
    M llvm/test/Transforms/SLPVectorizer/X86/partail.ll
    M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll

  Log Message:
  -----------
  [SLP]Emit actual bitwidth for analyzed MinBitwidth nodes, NFCI.

SLP includes analysis for the minimum bitwidth, the actual integer
operations can be emitted. It allows to reduce register pressure and
improve perf. Currently, it includes only cost model and the next
transformation relies on InstructionCombiner. Better to do it directly
in SLP, it allows to reduce compile time and fix cost model issues.