[all-commits] [llvm/llvm-project] 783ac3: [mlir][ArmSME] Make use of backend function attrib...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 783ac3b6fb70ce88182a4dee1db0d3f5fb93953c
      https://github.com/llvm/llvm-project/commit/783ac3b6fb70ce88182a4dee1db0d3f5fb93953c
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2023-11-14 (Tue, 14 Nov 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
    M mlir/include/mlir/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.h
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
    M mlir/lib/Dialect/ArmSME/Transforms/LegalizeForLLVMExport.cpp
    A mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
    M mlir/lib/ExecutionEngine/CMakeLists.txt
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
    M mlir/test/CMakeLists.txt
    M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
    M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
    M mlir/test/Target/LLVMIR/arm-sme.mlir
    M mlir/test/lit.cfg.py
    M mlir/test/lit.site.cfg.py.in

  Log Message:
  -----------
  [mlir][ArmSME] Make use of backend function attributes for enabling ZA storage (#71044)

Previously, we were inserting za.enable/disable intrinsics for functions
with the "arm_za" attribute (at the MLIR level), rather than using the
backend attributes. This was done to avoid a dependency on the SME ABI
functions from compiler-rt (which have only recently been implemented).

Doing things this way did have correctness issues, for example, calling
a streaming-mode function from another streaming-mode function (both
with ZA enabled) would lead to ZA being disabled after returning to the
caller (where it should still be enabled). Fixing issues like this would
require re-doing the ABI work already done in the backend within MLIR.

Instead, this patch switches to use the "arm_new_za" (backend) attribute
for enabling ZA for an MLIR function. For the integration tests, this
requires some way of linking the SME ABI functions. This is done via the
`%arm_sme_abi_shlib` lit substitution. By default, this expands to a
stub implementation of the SME ABI functions, but this can be overridden
by providing the `ARM_SME_ABI_ROUTINES_SHLIB` CMake cache variable
(pointing it at an alternative implementation). For now, the ArmSME
integration tests pass with just stubs, as we don't make use of nested
ZA-enabled calls.

A future patch may add an option to compiler-rt to build the SME
builtins into a standalone shared library to allow easily
building/testing with the actual implementation.