[all-commits] [llvm/llvm-project] 563720: [RISCV] Fix lowering of negative zero with Zdinx 3...

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 563720c3bed42a9ce042ba3f334793b5b4373acf
      https://github.com/llvm/llvm-project/commit/563720c3bed42a9ce042ba3f334793b5b4373acf
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2023-11-13 (Mon, 13 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/double-imm.ll

  Log Message:
  -----------
  [RISCV] Fix lowering of negative zero with Zdinx 32-bit (#71869)

The compiler currently abends with an impossible reg-to-reg copy when
producing a negative zero FP immediate on RV32 with -Zdinx. This is
because we emit a negation that uses FP registers. Emit the right node
to produce correct code.