[all-commits] [llvm/llvm-project] ca10e3: [LLVM][NVPTX] Add BF16 vector instruction and fix ...

[Han Shen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ca10e3b2e58289eb53f9844168471d709274f171
      https://github.com/llvm/llvm-project/commit/ca10e3b2e58289eb53f9844168471d709274f171
  Author: Han Shen <thushenhan at gmail.com>
  Date:   2023-11-12 (Sun, 12 Nov 2023)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    A llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
    A llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll

  Log Message:
  -----------
  [LLVM][NVPTX] Add BF16 vector instruction and fix lowering rules (#69415)

Add support for bf16x2 instructions such as setp, fneg, fabs, etc;
Fix the instructions that were not differentiated between sm_80 and
sm_90 support, such as fpround etc.
Add more bf16 test cases to ensure the correct behavior.

---------

Co-authored-by: shenhan03 <shenhan03 at kuaishou.com>