[all-commits] [llvm/llvm-project] 650026: [RISCV][SDAG] Prefer ShortForwardBranch to lower s...

[Yingwei Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 650026897c38ffebabd8c8377596141c37b65699
      https://github.com/llvm/llvm-project/commit/650026897c38ffebabd8c8377596141c37b65699
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2023-11-10 (Fri, 10 Nov 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    A llvm/test/CodeGen/RISCV/sdiv-pow2-cmov.ll

  Log Message:
  -----------
  [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (#67364)

This patch lowers `sdiv x, +/-2**k` to `add + select + shift` when the
short forward branch optimization is enabled. The latter inst seq
performs faster than the seq generated by target-independent
DAGCombiner. This algorithm is described in ***Hacker's Delight***.

This patch also removes duplicate logic in the X86 and AArch64 backend.
But we cannot do this for the PowerPC backend since it generates a
special instruction `addze`.