[all-commits] [llvm/llvm-project] 5ef446: [mlir][sparse][gpu] cleanup GPUDataTransferStrateg...

[Aart Bik via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5ef446790f4d9820999bfb2dd5f180c3e7cfdcb6
      https://github.com/llvm/llvm-project/commit/5ef446790f4d9820999bfb2dd5f180c3e7cfdcb6
  Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
  Date:   2023-11-08 (Wed, 08 Nov 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/dump-ptx.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib-from-linalg.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
    M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir

  Log Message:
  -----------
  [mlir][sparse][gpu] cleanup GPUDataTransferStrategy (#71615)

The flag seems to be doing practically the same thing for zero cost and
pinned dma. In addition, the register host is not truly the right zero
cost mechanism according to Thomas. So we are simplifying the setup for
now, until we have a better definition for what to implement and test.
    
https://github.com/llvm/llvm-project/issues/64316