[all-commits] [llvm/llvm-project] d5f3b3: [RegScavenger] Simplify state tracking for backwar...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d5f3b3b3b188d17aa8a2227d31e8fd7611d7dfff
      https://github.com/llvm/llvm-project/commit/d5f3b3b3b188d17aa8a2227d31e8fd7611d7dfff
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2023-11-08 (Wed, 08 Nov 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/RegisterScavenging.h
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/CodeGen/RegisterScavenging.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
    M llvm/test/CodeGen/XCore/scavenging.ll

  Log Message:
  -----------
  [RegScavenger] Simplify state tracking for backwards scavenging (#71202)

Track the live register state immediately before, instead of after,
MBBI. This makes it simple to track the state at the start or end of a
basic block without a separate (and poorly named) Tracking flag.

This changes the API of the backward(MachineBasicBlock::iterator I)
method, which now recedes to the state just before, instead of just
after, *I. Some clients are simplified by this change.

There is one small functional change shown in the lit tests where
multiple spilled registers all need to be reloaded before the same
instruction. The reloads will now be inserted in the opposite order.
This should not affect correctness.