[all-commits] [llvm/llvm-project] ed350b: [mlir][ArmSME] Add support for lowering masked til...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ed350bb3d8e2ec48b1e75265d48cd1dbe4f6588c
      https://github.com/llvm/llvm-project/commit/ed350bb3d8e2ec48b1e75265d48cd1dbe4f6588c
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2023-11-06 (Mon, 06 Nov 2023)

  Changed paths:
    M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
    M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Add support for lowering masked tile_store ops (#71180)

This patch extends ArmSMEToSCF to support lowering of masked tile_store
ops. Only masks created by 'vector.create_mask' are currently supported.

Example:

  %mask = vector.create_mask %c3, %c2 : vector<[4]x[4]xi1>
  arm_sme.tile_store %tile, %dest[%c0, %c0], %mask : memref<?x?xi32>,
vector<[4]x[4]xi32>

Produces:

  %num_rows = arith.constant 3 : index
  %num_cols = vector.create_mask %c2 : vector<[4]xi1>
  scf.for %slice_idx = %c0 to %num_rows step %c1
    arm_sme.store_tile_slice %tile, %slice_idx, %num_cols, %dest[%slice_idx, %c0]
      : memref<?x?xi32>, vector<[4]xi1>, vector<[4]x[4]xi32>