[all-commits] [llvm/llvm-project] 63c42b: [RISCV][GISel] Remove what I think is an unnecessa...
Craig Topper via All-commits
all-commits at lists.llvm.org
Sun Nov 5 18:31:08 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 63c42b1deebe11be44829a72db83e180a4dfb2c9
https://github.com/llvm/llvm-project/commit/63c42b1deebe11be44829a72db83e180a4dfb2c9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
Log Message:
-----------
[RISCV][GISel] Remove what I think is an unnecessary insert point adjustment from RISCVCallLowering::lowerCall.
Other targets don't do this and no tests are affected by removing it.
Commit: 9f6010d09e11ccb1fb40f9bd892133fd120bece5
https://github.com/llvm/llvm-project/commit/9f6010d09e11ccb1fb40f9bd892133fd120bece5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mulo.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mulo.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir
Log Message:
-----------
[RISCV][GISel] Emit ADJCALLSTACKDOWN/UP instructions in RISCVCallLowering::lowerCall.
This is needed to mark the stack usage for the call.
With this change, I'm now able to succesfully execute spec2006int
compiled with -O0. There are still many fallbacks that need to be
addressed.
Compare: https://github.com/llvm/llvm-project/compare/6c59f0e1b0fb...9f6010d09e11
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