[all-commits] [llvm/llvm-project] fd887a: LegalizeVectorTypes: fix bug in widening of vec re...

[Ramkumar Ramachandra via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd887a3633734d3db8ea94b8eb6f6445243094f8
      https://github.com/llvm/llvm-project/commit/fd887a3633734d3db8ea94b8eb6f6445243094f8
  Author: Ramkumar Ramachandra <Ramkumar.Ramachandra at imgtec.com>
  Date:   2023-11-03 (Fri, 03 Nov 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
    M llvm/test/CodeGen/X86/vector-lrint.ll

  Log Message:
  -----------
  LegalizeVectorTypes: fix bug in widening of vec result in xrint (#71198)

Fix a bug introduced in 98c90a1 (ISel: introduce vector ISD::LRINT,
ISD::LLRINT; custom RISCV lowering), where ISD::LRINT and ISD::LLRINT
used WidenVecRes_Unary to widen the vector result. This leads to
incorrect CodeGen for RISC-V fixed-vectors of length 3, and a crash in
SelectionDAG when we try to lower llvm.lrint.vxi32.vxf64 on i686. Fix
the bug by implementing a correct WidenVecRes_XRINT.

Fixes #71187.