[all-commits] [llvm/llvm-project] de8837: [LLVM][AArch64] Add ASM constraints for reduced GP...

[Paul Walker via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: de88371d9d62eac598f8603b9a2aee6cbce4fe21
      https://github.com/llvm/llvm-project/commit/de88371d9d62eac598f8603b9a2aee6cbce4fe21
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2023-11-03 (Fri, 03 Nov 2023)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/test/CodeGen/aarch64-inline-asm.c
    M llvm/docs/LangRef.rst
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/inlineasm-Uc-constraint.ll

  Log Message:
  -----------
  [LLVM][AArch64] Add ASM constraints for reduced GPR register ranges. (#70970)

[LLVM][AArch64] Add ASM constraints for reduced GPR register ranges.
    
The patch adds the follow ASM constraints:
  Uci => w8-w11/x8-x11
  Ucj => w12-w15/x12-x15
    
These constraints are required for SME load/store instructions
where a reduced set of GPRs are used to specify ZA array vectors.
    
NOTE: GCC has agreed to use the same constraint syntax.