[all-commits] [llvm/llvm-project] 8fd43f: [mlir][ArmSME] Provide descriptions and summaries ...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8fd43fddd3b1c1dba9d59a10268a6cd71c2e3504
      https://github.com/llvm/llvm-project/commit/8fd43fddd3b1c1dba9d59a10268a6cd71c2e3504
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2023-11-03 (Fri, 03 Nov 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td

  Log Message:
  -----------
  [mlir][ArmSME] Provide descriptions and summaries for intrinsic types (#71057)

Follow on for some types missed in #70920. This also replaces the
LDSTPredicate with SVEPredicate (as they are equivalent), and adds a
missing rank == 1 checks to the SVE vector types.

A FIXME is also added to point out an issue in the MOPVector type
constraint.