[all-commits] [llvm/llvm-project] 945d2e: [RISCV] Support Xsfvfwmaccqqq extensions (#68296)

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 945d2e6e603dd9cc5d155a3a34b67ecf17b91b68
      https://github.com/llvm/llvm-project/commit/945d2e6e603dd9cc5d155a3a34b67ecf17b91b68
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2023-11-03 (Fri, 03 Nov 2023)

  Changed paths:
    M clang/include/clang/Basic/riscv_sifive_vector.td
    M clang/include/clang/Support/RISCVVIntrinsicUtils.h
    M clang/lib/Sema/SemaRISCVVectorLookup.cpp
    A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/sf_vfwmacc_4x4x4.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/sf_vfwmacc_4x4x4.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/sf_vfwmacc_4x4x4.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/sf_vfwmacc_4x4x4.c
    M clang/test/Preprocessor/riscv-target-features.c
    M clang/test/Sema/rvv-required-features-invalid.c
    M clang/test/Sema/rvv-required-features.c
    M clang/utils/TableGen/RISCVVEmitter.cpp
    M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    A llvm/test/CodeGen/RISCV/rvv/sf_vfwmacc_4x4x4.ll
    A llvm/test/MC/RISCV/rvv/xsfvfwmacc.s
    M llvm/unittests/Support/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Support Xsfvfwmaccqqq extensions (#68296)

Bfloat16 Matrix Multiply Accumulate Instruction

https://sifive.cdn.prismic.io/sifive/c391d53e-ffcf-4091-82f6-c37bf3e883ed_xsfvfwmaccqqq-spec.pdf