[all-commits] [llvm/llvm-project] 86f2e0: [AMDGPU] Tweak handling of GlobalAddress operands ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 86f2e0925051a860eb0a2c187b185b47c88ec45a
      https://github.com/llvm/llvm-project/commit/86f2e0925051a860eb0a2c187b185b47c88ec45a
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2023-11-01 (Wed, 01 Nov 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
    M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll

  Log Message:
  -----------
  [AMDGPU] Tweak handling of GlobalAddress operands in SI_PC_ADD_REL_OFFSET (#70960)

When SI_PC_ADD_REL_OFFSET is expanded to S_GETPC/S_ADD/S_ADDC, the
GlobalAddress operands have to be adjusted by 4 or 12 bytes to account
for the offset from the end of the S_GETPC instruction to the literal
operands. Do this all in SIInstrInfo::expandPostRAPseudo instead of
duplicating the adjustment code in both AMDGPULegalizerInfo and
SITargetLowering. NFCI.