[all-commits] [llvm/llvm-project] 6477b4: [llvm][AArch64][Assembly]: Add FP8FMA assembly an...

hassnaaHamdi via All-commits all-commits at lists.llvm.org
Wed Nov 1 06:03:13 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6477b41a0b56919c42f44c3499ed32720101b43b
      https://github.com/llvm/llvm-project/commit/6477b41a0b56919c42f44c3499ed32720101b43b
  Author: hassnaaHamdi <hassnaa.hamdi at arm.com>
  Date:   2023-11-01 (Wed, 01 Nov 2023)

  Changed paths:
    M llvm/include/llvm/TargetParser/AArch64TargetParser.h
    M llvm/include/llvm/TargetParser/SubtargetFeature.h
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SchedA64FX.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/MC/AArch64/FP8/directive-arch-negative.s
    M llvm/test/MC/AArch64/FP8/directive-arch.s
    A llvm/test/MC/AArch64/FP8/mla-diagnostic.s
    A llvm/test/MC/AArch64/FP8/mla.s
    A llvm/test/MC/AArch64/FP8_SVE2/fmlal-diagnostics.s
    A llvm/test/MC/AArch64/FP8_SVE2/fmlal.s
    A llvm/test/MC/AArch64/FP8_SVE2/fmlall-diagnostics.s
    A llvm/test/MC/AArch64/FP8_SVE2/fmlall.s
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [llvm][AArch64][Assembly]: Add FP8FMA  assembly and disassembly. (#70134)

This patch adds the feature flag FP8FMA and the assembly/disassembly
for the following instructions of NEON and SVE2:
  * NEON: 
    - FMLALBlane
    - FMLALTlane
    - FMLALLBBlane
    - FMLALLBTlane
    - FMLALLTBlane
    - FMLALLTTlane
    - FMLALB
    - FMLALT
    - FMLALLB
    - FMLALLBT
    - FMLALLTB
    - FMLALLTT
  * SVE2:
    - FMLALB_ZZZI
    - FMLALT_ZZZI
    - FMLALB_ZZZ 
    - FMLALT_ZZZ 
    - FMLALLBB_ZZZI 
    - FMLALLBT_ZZZI 
    - FMLALLTB_ZZZI 
    - FMLALLTT_ZZZI 
    - FMLALLBB_ZZZ 
    - FMLALLBT_ZZZ 
    - FMLALLTB_ZZZ 
    - FMLALLTT_ZZZ

That is according to this documentation:
https://developer.arm.com/documentation/ddi0602/2023-09




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