[all-commits] [llvm/llvm-project] f24d94: [RISCV] Match prefetch address with offset (#66072)

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f24d9490e560639be45764d2fe3e6c52f31a1059
      https://github.com/llvm/llvm-project/commit/f24d9490e560639be45764d2fe3e6c52f31a1059
  Author: Wang Pengcheng <137158460+wangpc-pp at users.noreply.github.com>
  Date:   2023-10-20 (Fri, 20 Oct 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/test/CodeGen/RISCV/prefetch.ll

  Log Message:
  -----------
  [RISCV] Match prefetch address with offset (#66072)

A new ComplexPattern `AddrRegImmLsb00000` is added, which is like
`AddrRegImm` except that if the least significant 5 bits isn't all
zeros, we will fail back to offset 0.