[all-commits] [llvm/llvm-project] 5f5faf: [RISCV][GISel] Add ISel supports for SHXADD from Z...

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f5faf407b42342708ce31a1ca3095ddff10dad8
      https://github.com/llvm/llvm-project/commit/5f5faf407b42342708ce31a1ca3095ddff10dad8
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2023-10-18 (Wed, 18 Oct 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/lib/Target/RISCV/RISCVGISel.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv32.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir

  Log Message:
  -----------
  [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (#67863)

This patch consists of porting SDISel patterns of SHXADD instructions to
GISel.
Note that `non_imm12`, a predicate that was implemented with `PatLeaf`,
is now turned into a `PatFrag` of `<op>_with_non_imm12` where `op` is
the operator that uses `the non_imm12` operand, as GISel doesn't have
equivalence of `PatLeaf` at this moment.