[all-commits] [llvm/llvm-project] 45636e: [RISCV] Add sink-and-fold support for RISC-V. (#67...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 45636ecf2c3a4a216f26bfe5a7d1495b9f7a8405
      https://github.com/llvm/llvm-project/commit/45636ecf2c3a4a216f26bfe5a7d1495b9f7a8405
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-10-07 (Sat, 07 Oct 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/split-offsets.ll
    M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
    M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll

  Log Message:
  -----------
  [RISCV] Add sink-and-fold support for RISC-V. (#67602)

This uses the recently introduced sink-and-fold support in MachineSink.
https://reviews.llvm.org/D152828
    
This enables folding ADDI into load/store addresses.
    
Enabling by default will be a separate PR.