[all-commits] [llvm/llvm-project] f045f2: [AArch64][SME] Fix generating incorrect TBZ when l...

[Amara Emerson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f045f2c26d0b31db0d1c61babf7b65351287a8d9
      https://github.com/llvm/llvm-project/commit/f045f2c26d0b31db0d1c61babf7b65351287a8d9
  Author: Amara Emerson <amara at apple.com>
  Date:   2023-10-06 (Fri, 06 Oct 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/test/CodeGen/AArch64/sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll
    M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
    M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
    M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll

  Log Message:
  -----------
  [AArch64][SME] Fix generating incorrect TBZ when lowering lazy save. (#68429)

After calling arm_sme_state, the -S assembly would show clang generating
a “tbz xN, #0, Lbb”. However, disassembling it showed that it was
actually encoded as “tbz xN, #32, Lbb”. The issue is that for TBZ, if
you want a bit offset <32 you need to use the W variant, since the
instruction overloads the top bit of the immediate.