[all-commits] [llvm/llvm-project] be382d: [AMDGPU] Use correct operand order for shifts (#68...

[Diana via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: be382de0596d5d2c7a7ee7363bbb499df731acc6
      https://github.com/llvm/llvm-project/commit/be382de0596d5d2c7a7ee7363bbb499df731acc6
  Author: Diana <Diana-Magda.Picus at amd.com>
  Date:   2023-10-06 (Fri, 06 Oct 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/frame-index.mir

  Log Message:
  -----------
  [AMDGPU] Use correct operand order for shifts (#68299)

In a special case in frame index elimination (when the offset is 0), we
generate either a S_LSHR_B32 or a V_LSHRREV_B32 using the same code.
However, they don't expect their operands in the same order - S_LSHR_B32
takes the value to be shifted first and then the shift amount, whereas
V_LSHRREV_B32 has the operands reversed (hence the REV in its name).
Update the code & tests to take this into account. Also remove an
outdated comment (this code is definitely reachable now that non-entry
functions no longer have a fixed emergency scavenge slot).