[all-commits] [llvm/llvm-project] 81232f: Re-generate pow-4.ll in preparation for D141060

Alexander Richardson via All-commits all-commits at lists.llvm.org
Wed Oct 4 10:52:50 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 81232f2268cd3325d11982e4d477f16d8b4b9a82
      https://github.com/llvm/llvm-project/commit/81232f2268cd3325d11982e4d477f16d8b4b9a82
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2023-10-04 (Wed, 04 Oct 2023)

  Changed paths:
    M llvm/test/Transforms/InstCombine/pow-4.ll

  Log Message:
  -----------
  Re-generate pow-4.ll in preparation for D141060

Not all functions were being checked, it looks like the CHECK prefix
was changed at some point from CHECK32 to CHECKI32.


  Commit: 83c4227ab7a0f03bdd394afefdf2158a7308aeac
      https://github.com/llvm/llvm-project/commit/83c4227ab7a0f03bdd394afefdf2158a7308aeac
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2023-10-04 (Wed, 04 Oct 2023)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
    M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
    M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
    M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
    M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
    M llvm/test/CodeGen/AMDGPU/lower-module-lds-used-list.ll
    M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
    M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
    M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
    M llvm/test/Instrumentation/SanitizerCoverage/cmp-tracing-api-x86_32.ll
    M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
    M llvm/test/Transforms/SafeStack/X86/setjmp2.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll

  Log Message:
  -----------
  Auto-generate test checks for tests affected by D141060

These files had manual CHECK lines which make the diff from D141060
very difficult to review.


  Commit: e86d6a43f03b6d635d8d1101a936088c8cf0cf23
      https://github.com/llvm/llvm-project/commit/e86d6a43f03b6d635d8d1101a936088c8cf0cf23
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2023-10-04 (Wed, 04 Oct 2023)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
    M llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
    M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
    M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
    M llvm/test/Transforms/InstCombine/ffs-i16.ll
    M llvm/test/Transforms/InstCombine/fls-i16.ll
    M llvm/test/Transforms/InstCombine/isascii-i16.ll
    M llvm/test/Transforms/InstCombine/isdigit-i16.ll
    M llvm/test/Transforms/InstCombine/pow_fp_int.ll
    M llvm/test/Transforms/InstCombine/printf-i16.ll
    M llvm/test/Transforms/InstCombine/puts-i16.ll
    M llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
    M llvm/test/Transforms/MergeICmps/X86/addressspaces.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll
    M llvm/test/Transforms/SLPVectorizer/X86/control-dependence.ll

  Log Message:
  -----------
  Regenerate test checks for tests affected by D141060


Compare: https://github.com/llvm/llvm-project/compare/45a334d31cc3...e86d6a43f03b


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