[all-commits] [llvm/llvm-project] afe400: [MLIR] Use `test-lower-to-nvvm` for sm_90 Integrat...

[Guray Ozen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afe400620f9d22c9d877bd92d437d5dd761708be
      https://github.com/llvm/llvm-project/commit/afe400620f9d22c9d877bd92d437d5dd761708be
  Author: Guray Ozen <guray.ozen at gmail.com>
  Date:   2023-10-04 (Wed, 04 Oct 2023)

  Changed paths:
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
    M mlir/test/lib/Dialect/GPU/TestLowerToNVVM.cpp

  Log Message:
  -----------
  [MLIR] Use `test-lower-to-nvvm` for sm_90 Integration Tests on GitHub (#68184)

This PR enables `test-lower-to-nvvm` pass pipeline for the integration
tests for NVIDIA sm_90 architecture.

This PR adjusts `test-lower-to-nvvm` pass in two ways: 

1) Calls `createConvertNVGPUToNVVMPass` before the outlining process.
This particular pass is responsible for generating both device and host
code. On the host, it calls the CUDA driver to build the TMA descriptor
(`cuTensorMap`).

2) Integrates the `createConvertNVVMToLLVMPass` to generate PTXs for
NVVM Ops.