[all-commits] [llvm/llvm-project] 32a23a: RegisterCoalescer: Forcibly leave SSA to avoid MIR...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32a23aecf8002e181eb1022b8733ef8666b3241f
      https://github.com/llvm/llvm-project/commit/32a23aecf8002e181eb1022b8733ef8666b3241f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-10-02 (Mon, 02 Oct 2023)

  Changed paths:
    M llvm/lib/CodeGen/RegisterCoalescer.cpp

  Log Message:
  -----------
  RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors

Not sure how to produce a test that demonstrates the problem
today. The coalescer would have to introduce a verifier caught SSA
violation, like multiple defs of a virtual register. I'm not sure what
would do that now, but an upcoming patch will.

https://reviews.llvm.org/D156271