[all-commits] [llvm/llvm-project] aca8b9: [DAG] SimplifyDemandedBits - if we're only demandi...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Fri Sep 1 02:59:43 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: aca8b9d0d56eea757b6903f75ff529f545ab229d
https://github.com/llvm/llvm-project/commit/aca8b9d0d56eea757b6903f75ff529f545ab229d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-09-01 (Fri, 01 Sep 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/known-signbits-vector.ll
Log Message:
-----------
[DAG] SimplifyDemandedBits - if we're only demanding the signbits, a MIN/MAX node can be simplified to a OR or AND node
Extension to the signbit case, if the signbits extend down through all the demanded bits then SMIN/SMAX/UMIN/UMAX nodes can be simplified to a OR/AND/AND/OR.
Alive2: https://alive2.llvm.org/ce/z/mFVFAn (general case)
Differential Revision: https://reviews.llvm.org/D158364
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