[all-commits] [llvm/llvm-project] 126608: InstCombine: Add baseline test for detecting fneg/...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 12660867307816cd808e0c21be4471a385154658
      https://github.com/llvm/llvm-project/commit/12660867307816cd808e0c21be4471a385154658
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    A llvm/test/Transforms/InstCombine/fabs-as-int.ll
    A llvm/test/Transforms/InstCombine/fneg-as-int.ll
    A llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll

  Log Message:
  -----------
  InstCombine: Add baseline test for detecting fneg/fabs as bitcasted integer


  Commit: 50a9b3d8a5220c21c57197ef4c9483a2b9d14fd5
      https://github.com/llvm/llvm-project/commit/50a9b3d8a5220c21c57197ef4c9483a2b9d14fd5
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/fneg-as-int.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll

  Log Message:
  -----------
  InstCombine: Recognize fneg when performed as bitcasted integer

This is a resurrection of D18874. This was previously wrong with
fneg conflated with fsub, but we now have a proper fneg instruction.
Additionally, I think it is now clearer that IR float=IEEE float,
and a different bit layout would require adding a different IR type.

https://reviews.llvm.org/D151934


  Commit: 5c0da5839de1bdc08f411a04305a9bdadf538ad5
      https://github.com/llvm/llvm-project/commit/5c0da5839de1bdc08f411a04305a9bdadf538ad5
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/fabs-as-int.ll
    M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll

  Log Message:
  -----------
  InstCombine: Recognize fabs as bitcasted integer

In the past we sort of pretended float might be implementable
as a non-IEEE type but that never realistically would work. Exotic
FP types would need to be added to the IR. Turning these
into FP operations enables FP tracking optimizations.

https://reviews.llvm.org/D151937


  Commit: 70aede228a1b6fca90b96bc8a6245b92e20316c6
      https://github.com/llvm/llvm-project/commit/70aede228a1b6fca90b96bc8a6245b92e20316c6
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll

  Log Message:
  -----------
  InstCombine: Recognize fneg(fabs) as bitcasted integer

Technically increases the number of instructions if the
result isn't cast back to float. Even in this case it's
still probably a better canonical form since it enables FP value
tracking.

https://reviews.llvm.org/D151939


Compare: https://github.com/llvm/llvm-project/compare/7f12000a5f8a...70aede228a1b