[all-commits] [llvm/llvm-project] 0d7325: [RISCV] Precommit test for D158062

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0d73259cf24bf840a980124a90fc80eefa7d70d8
      https://github.com/llvm/llvm-project/commit/0d73259cf24bf840a980124a90fc80eefa7d70d8
  Author: wangpc <wangpengcheng.pp at bytedance.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll

  Log Message:
  -----------
  [RISCV] Precommit test for D158062

Tests for callbr, multi-operands and multi-asm are added.

Reviewed By: wangpc, craig.topper

Differential Revision: https://reviews.llvm.org/D158149


  Commit: f281543a48905e58359c6b0f1b9c3b42bd67e315
      https://github.com/llvm/llvm-project/commit/f281543a48905e58359c6b0f1b9c3b42bd67e315
  Author: wangpc <wangpengcheng.pp at bytedance.com>
  Date:   2023-08-31 (Thu, 31 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
    M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll

  Log Message:
  -----------
  [RISCV] Teach RISCVMergeBaseOffset to handle inline asm

For inline asm with memory operands, we can merge the offset into
the second operand of memory constraint operands.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D158062


Compare: https://github.com/llvm/llvm-project/compare/1968f0d7981d...f281543a4890