[all-commits] [llvm/llvm-project] 299b1b: [SelectionDAG][RISCV] Teach getConstant to use SPL...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 299b1b407148c519f899a5d799b45c19c7484cb8
      https://github.com/llvm/llvm-project/commit/299b1b407148c519f899a5d799b45c19c7484cb8
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-29 (Tue, 29 Aug 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll

  Log Message:
  -----------
  [SelectionDAG][RISCV] Teach getConstant to use SPLAT_VECTOR_PARTS if vXi64 SPLAT_VECTOR is legal but i64 scalars are not.

That matches how such a SPLAT_VECTOR would have been type legalized
so assume it is ok to use for creating constants after type legalization.

Still need some improvements to SPLAT_VECTOR lowering.

This overlaps with some of what D158742 was trying to fix.

Reviewed By: luke

Differential Revision: https://reviews.llvm.org/D158870