[all-commits] [llvm/llvm-project] 85cf2e: [X86] combineConcatVectorOps - concatenation of co...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 85cf2e8286ddcd77368879584363d46e42899a43
      https://github.com/llvm/llvm-project/commit/85cf2e8286ddcd77368879584363d46e42899a43
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-08-29 (Tue, 29 Aug 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
    M llvm/test/CodeGen/X86/vector-trunc-usat.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - concatenation of constant subvectors is free.


  Commit: 2a82da8097c604e715d47945dae4adfa469287e4
      https://github.com/llvm/llvm-project/commit/2a82da8097c604e715d47945dae4adfa469287e4
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-08-29 (Tue, 29 Aug 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
    M llvm/test/CodeGen/X86/widen_bitcnt.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - handle splatting of a X86ISD::SUBV_BROADCAST_LOAD node

If we're splatting the original subvector width then just use the original X86ISD::SUBV_BROADCAST_LOAD node - similar to what we're already doing with X86ISD::VBROADCAST/VBROADCAST_LOAD


Compare: https://github.com/llvm/llvm-project/compare/18f1c1ace7a6...2a82da8097c6