[all-commits] [llvm/llvm-project] cd7280: [TableGen] Fix wrong lex result on 64-bit integer ...

Senran (Stephen) Zhang via All-commits all-commits at lists.llvm.org
Sun Aug 20 21:46:49 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd7280b6e6c43e3c236200bc026f45d33f54f059
  Author: Senran Zhang <zsrkmyn at gmail.com>
  Date:   2023-08-20 (Sun, 20 Aug 2023)

  Changed paths:
    M llvm/lib/TableGen/TGLexer.cpp
    A llvm/test/TableGen/64-bit-int.td

  Log Message:
  [TableGen] Fix wrong lex result on 64-bit integer boundaries

Binary and decimal values were reconginzed by strtoll, which returns
error when the msb is 1, and the error was ignored, resulting to wrong

This patch fixes the issue.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D157079

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