[all-commits] [llvm/llvm-project] cd7280: [TableGen] Fix wrong lex result on 64-bit integer ...

[Senran (Stephen) Zhang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd7280b6e6c43e3c236200bc026f45d33f54f059
      https://github.com/llvm/llvm-project/commit/cd7280b6e6c43e3c236200bc026f45d33f54f059
  Author: Senran Zhang <zsrkmyn at gmail.com>
  Date:   2023-08-20 (Sun, 20 Aug 2023)

  Changed paths:
    M llvm/lib/TableGen/TGLexer.cpp
    A llvm/test/TableGen/64-bit-int.td

  Log Message:
  -----------
  [TableGen] Fix wrong lex result on 64-bit integer boundaries

Binary and decimal values were reconginzed by strtoll, which returns
error when the msb is 1, and the error was ignored, resulting to wrong
results.

This patch fixes the issue.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D157079